Windows 10: Intel Introduces Tremont Microarchitecture

Brink · Oct 24, 2019

What’s New: Today at the Linley Fall Processor Conference in Santa Clara, Calif., Intel revealed the first architectural details related to Tremont. Intel’s newest and most advanced low-power x86 CPU architecture, Tremont offers a significant performance boost over prior generations.
“Tremont is Intel’s most advanced low-power x86 architecture to date. We focused on a range of modern, complex workloads, while considering networking, client, browser and battery so that we could raise performance efficiently across the board. It is a world-class CPU architecture designed for enhanced processing power in compact, low-power packages.”
–Stephen Robinson, Intel Tremont Chief Architect
Why It Matters: Tremont next-generation low-power x86 microarchitecture delivers significant IPC (instructions per cycle) gains gen-over-gen compared with Intel’s prior low-power x86 architectures. Designed for enhanced processing power in compact, low-power packages, Tremont-based processors will enable a new generation of innovative form factors for client devices, creative applications for the internet of things (IoT), efficient data center products and more.

When combined with other technologies across Intel’s broader IP portfolio, this architecture will enable a new generation of products. Using Intel’s 3D packaging technology Foveros, Tremont is integrated within a wider set of silicon IPs in Lakefield, which will power breakthrough innovative devices like the recently announced dual-screen Microsoft Surface Neo.

Intel Corporation in October 2019 introduced its Tremont microarchitecture. Intel Tremont advances instruction set architecture, microarchitecture, security and power management. Tremont is designed for enhanced processing power in compact, low-power packages. Tremont-based processors will enable a new generation of innovative form factors. (Credit: Intel Corporation)

Intel Corporation in October 2019 introduced its Tremont microarchitecture. Intel Tremont advances instruction set architecture, microarchitecture, security and power management. Tremont’s unique 6-wide (2x3-wide clustered) out-of-order decoder in the front end allows for a more efficient feed to the wider back end, which is fundamental for performance. (Credit: Intel Corporation)

Performant architectures are the foundation of chips that capture and process data. Low-power solutions are essential to enabling new use cases driven by smaller form factors.

The Details: Intel Tremont includes several advancements in ISA (instruction set architecture), microarchitecture, security and power management. It delivers significant IPC gains gen-over-gen as compared with Intel’s prior low-power x86 architectures, making it a first-class offering for powering a new generation of Intel products across client, IoT and data center offerings. Tremont’s unique 6-wide (2×3-wide clustered) out-of-order decoder in the front end allows for a more efficient feed to the wider back end, which is fundamental for performance.

For more complete information about performance and benchmark results, visit Intel’s Performance Benchmark page.

More Context: Introducing Intel Tremont Microarchitecture (Stephen Robinson’s Linley Presentation) | Client Computing News
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Source: Intel Introduces Tremont Microarchitecture | Intel Newsroom

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haswrong · Oct 24, 2019

Intel Skylake Microarchitecture Detailed

oh damn, i read: "Intel Skylake Microarchitecture Dead" *Slap :slap:

i might be a disgraphic..

Brink · Oct 24, 2019

Intel Microarchitectural Data Sampling Advisory

[table][tr]Intel ID: INTEL-SA-00233 [/tr] [tr][td]Advisory Category:[/td] [td]Hardware[/td] [/tr] [tr][td]Impact of vulnerability:[/td] [td]Information Disclosure[/td] [/tr] [tr][td]Severity rating:[/td] [td]MEDIUM[/td] [/tr] [tr][td]Original release:[/td] [td]05/14/2019[/td] [/tr] [tr][td]Last revised:[/td] [td]05/14/2019[/td] [/tr] [/table]

Summary:

A potential security vulnerability in CPUs may allow information disclosure. Intel is releasing Microcode Updates (MCU) updates to mitigate this potential vulnerability.

Vulnerability Details:

CVEID: CVE-2018-12126
Microarchitectural Store Buffer Data Sampling (MSBDS): Store buffers on some microprocessors utilizing speculative execution may allow an authenticated user to potentially enable information disclosure via a side channel with local access.
CVSS Base Score: 6.5 Medium
CVSS Vector: CVSS:3.0/AV:L/AC:L/PR:L/UI:N/S:C/C:H/I:N/A:N

CVEID: CVE-2018-12127
Microarchitectural Load Port Data Sampling (MLPDS): Load ports on some microprocessors utilizing speculative execution may allow an authenticated user to potentially enable information disclosure via a side channel with local access.
CVSS Base Score: 6.5 Medium
CVSS Vector: CVSS:3.0/AV:L/AC:L/PR:L/UI:N/S:C/C:H/I:N/A:N

CVEID: CVE-2018-12130
Microarchitectural Fill Buffer Data Sampling (MFBDS): Fill buffers on some microprocessors utilizing speculative execution may allow an authenticated user to potentially enable information disclosure via a side channel with local access.
CVSS Base Score: 6.5 Medium
CVSS Vector: CVSS:3.0/AV:L/AC:L/PR:L/UI:N/S:C/C:H/I:N/A:N

CVEID: CVE-2019-11091
Microarchitectural Data Sampling Uncacheable Memory (MDSUM): Uncacheable memory on some microprocessors utilizing speculative execution may allow an authenticated user to potentially enable information disclosure via a side channel with local access.
CVSS Base Score: 3.8 Low
CVSS Vector: CVSS:3.0/AV:L/AC:L/PR:L/UI:N/S:C/C:L/I:N/A:N

Affected Products:

A list of impacted products can be found here.

Recommendation:

Intel has worked with operating system vendors, equipment manufacturers, and other ecosystem partners to develop platform firmware and software updates that can help protect systems from these methods. This includes the release of updated Intel microprocessor microcode to our customers and partners.

Status of available microcode can be found here.

Public Github: https://github.com/intel/Intel-Linux...ode-Data-Files

End users and systems administrators should check with their system manufacturers and system software vendors and apply any available updates as soon as practical.

Acknowledgements:

Microarchitectural Store Buffer Data Sampling (MSBDS) - CVE-2018-12126: This vulnerability was found internally by Intel employees. Intel would like to thank Ke Sun, Henrique Kawakami, Kekai Hu and Rodrigo Branco. It was independently reported by Lei Shi - Qihoo - 360 CERT and by Marina Minkin1, Daniel Moghimi2, Moritz Lipp3, Michael Schwarz3, Jo Van Bulck4, Daniel Genkin1, Daniel Gruss3, Berk Sunar2, Frank Piessens4, Yuval Yarom5 (1University of Michigan, 2Worcester Polytechnic Institute, 3Graz University of Technology, 4imec-DistriNet, KU Leuven, 5University of Adelaide).

Microarchitectural Load Port Data Sampling (MLPDS) - CVE-2018-12127: This vulnerability was found internally by Intel employees and Microsoft. Intel would like to thank Brandon Falk – Microsoft Windows Platform Security Team, Ke Sun, Henrique Kawakami, Kekai Hu, and Rodrigo Branco - Intel. It was independently reported by Matt Miller – Microsoft, and by Stephan van Schaik, Alyssa Milburn, Sebastian Österlund, Pietro Frigo, Kaveh Razavi, Herbert Bos, and Cristiano Giuffrida - VUSec group at VU Amsterdam.

Microarchitectural Fill Buffer Data Sampling (MFBDS) - CVE-2018-12130: This vulnerability was found internally by Intel employees. Intel would like to thank Ke Sun, Henrique Kawakami, Kekai Hu and Rodrigo Branco. It was independently reported by Giorgi Maisuradze – Microsoft Research, and by Dan Horea Lutas, and Andrei Lutas - Bitdefender, and by Volodymyr Pikhur, and by Stephan van Schaik, Alyssa Milburn, Sebastian Österlund, Pietro Frigo, Kaveh Razavi, Herbert Bos, and Cristiano Giuffrida - VUSec group at VU Amsterdam, and by Moritz Lipp, Michael Schwarz, and Daniel Gruss - Graz University of Technology.

Microarchitectural Data Sampling Uncacheable Memory (MDSUM) – CVE-2019-11091: This vulnerability was found internally by Intel employees. Intel would like to thank Ke Sun, Henrique Kawakami, Kekai Hu and Rodrigo Branco. It was independently found by Volodrmyr Pikhur, and by Moritz Lipp, Michael Schwarz, Daniel Gruss - Graz University of Technology, and by Stephan van Schaik, Alyssa Milburn, Sebastian Österlund, Pietro Frigo, Kaveh Razavi, Herbert Bos, and Cristiano Giuffrida - VUSec group at VU Amsterdam.

Intel, and nearly the entire technology industry, follows a disclosure practice called Coordinated Disclosure, under which a cybersecurity vulnerability is generally publicly disclosed only after mitigations are available.

Revision History

[table][tr]Revision Date Description [/tr] [tr][td]1.0[/td] [td]05/14/2019[/td] [td]Initial Release[/td] [/tr] [/table]
Click to expand...

Source: https://www.intel.com/content/www/us...-sa-00233.html

See also:

Windows client guidance for IT Pros to protect against speculative

Summary of Intel microcode updates

KB4497165 Intel microcode updates for Windows 10 v1903 - May 14

KB4494452 Intel microcode updates for Windows 10 v1709 - May 14

KB4494453 Intel microcode updates for Windows 10 v1703 - May 14

KB4494175 Intel Microcode Updates for Windows 10 v1607 - May 14

KB4494454 Intel Microcode Updates for Windows 10 v1507 - May 14

Brink · Oct 24, 2019

Intel Microarchitectural Data Sampling Advisory

[table][tr]Intel ID: INTEL-SA-00233 [/tr] [tr][td]Advisory Category:[/td] [td]Hardware[/td] [/tr] [tr][td]Impact of vulnerability:[/td] [td]Information Disclosure[/td] [/tr] [tr][td]Severity rating:[/td] [td]MEDIUM[/td] [/tr] [tr][td]Original release:[/td] [td]05/14/2019[/td] [/tr] [tr][td]Last revised:[/td] [td]05/14/2019[/td] [/tr] [/table]

Summary:

A potential security vulnerability in CPUs may allow information disclosure. Intel is releasing Microcode Updates (MCU) updates to mitigate this potential vulnerability.

Vulnerability Details:

CVEID: CVE-2018-12126
Microarchitectural Store Buffer Data Sampling (MSBDS): Store buffers on some microprocessors utilizing speculative execution may allow an authenticated user to potentially enable information disclosure via a side channel with local access.
CVSS Base Score: 6.5 Medium
CVSS Vector: CVSS:3.0/AV:L/AC:L/PR:L/UI:N/S:C/C:H/I:N/A:N

CVEID: CVE-2018-12127
Microarchitectural Load Port Data Sampling (MLPDS): Load ports on some microprocessors utilizing speculative execution may allow an authenticated user to potentially enable information disclosure via a side channel with local access.
CVSS Base Score: 6.5 Medium
CVSS Vector: CVSS:3.0/AV:L/AC:L/PR:L/UI:N/S:C/C:H/I:N/A:N

CVEID: CVE-2018-12130
Microarchitectural Fill Buffer Data Sampling (MFBDS): Fill buffers on some microprocessors utilizing speculative execution may allow an authenticated user to potentially enable information disclosure via a side channel with local access.
CVSS Base Score: 6.5 Medium
CVSS Vector: CVSS:3.0/AV:L/AC:L/PR:L/UI:N/S:C/C:H/I:N/A:N

CVEID: CVE-2019-11091
Microarchitectural Data Sampling Uncacheable Memory (MDSUM): Uncacheable memory on some microprocessors utilizing speculative execution may allow an authenticated user to potentially enable information disclosure via a side channel with local access.
CVSS Base Score: 3.8 Low
CVSS Vector: CVSS:3.0/AV:L/AC:L/PR:L/UI:N/S:C/C:L/I:N/A:N

Affected Products:

A list of impacted products can be found here.

Recommendation:

Intel has worked with operating system vendors, equipment manufacturers, and other ecosystem partners to develop platform firmware and software updates that can help protect systems from these methods. This includes the release of updated Intel microprocessor microcode to our customers and partners.

Status of available microcode can be found here.

Public Github: https://github.com/intel/Intel-Linux...ode-Data-Files

End users and systems administrators should check with their system manufacturers and system software vendors and apply any available updates as soon as practical.

Acknowledgements:

Microarchitectural Store Buffer Data Sampling (MSBDS) - CVE-2018-12126: This vulnerability was found internally by Intel employees. Intel would like to thank Ke Sun, Henrique Kawakami, Kekai Hu and Rodrigo Branco. It was independently reported by Lei Shi - Qihoo - 360 CERT and by Marina Minkin1, Daniel Moghimi2, Moritz Lipp3, Michael Schwarz3, Jo Van Bulck4, Daniel Genkin1, Daniel Gruss3, Berk Sunar2, Frank Piessens4, Yuval Yarom5 (1University of Michigan, 2Worcester Polytechnic Institute, 3Graz University of Technology, 4imec-DistriNet, KU Leuven, 5University of Adelaide).

Microarchitectural Load Port Data Sampling (MLPDS) - CVE-2018-12127: This vulnerability was found internally by Intel employees and Microsoft. Intel would like to thank Brandon Falk – Microsoft Windows Platform Security Team, Ke Sun, Henrique Kawakami, Kekai Hu, and Rodrigo Branco - Intel. It was independently reported by Matt Miller – Microsoft, and by Stephan van Schaik, Alyssa Milburn, Sebastian Österlund, Pietro Frigo, Kaveh Razavi, Herbert Bos, and Cristiano Giuffrida - VUSec group at VU Amsterdam.

Microarchitectural Fill Buffer Data Sampling (MFBDS) - CVE-2018-12130: This vulnerability was found internally by Intel employees. Intel would like to thank Ke Sun, Henrique Kawakami, Kekai Hu and Rodrigo Branco. It was independently reported by Giorgi Maisuradze – Microsoft Research, and by Dan Horea Lutas, and Andrei Lutas - Bitdefender, and by Volodymyr Pikhur, and by Stephan van Schaik, Alyssa Milburn, Sebastian Österlund, Pietro Frigo, Kaveh Razavi, Herbert Bos, and Cristiano Giuffrida - VUSec group at VU Amsterdam, and by Moritz Lipp, Michael Schwarz, and Daniel Gruss - Graz University of Technology.

Microarchitectural Data Sampling Uncacheable Memory (MDSUM) – CVE-2019-11091: This vulnerability was found internally by Intel employees. Intel would like to thank Ke Sun, Henrique Kawakami, Kekai Hu and Rodrigo Branco. It was independently found by Volodrmyr Pikhur, and by Moritz Lipp, Michael Schwarz, Daniel Gruss - Graz University of Technology, and by Stephan van Schaik, Alyssa Milburn, Sebastian Österlund, Pietro Frigo, Kaveh Razavi, Herbert Bos, and Cristiano Giuffrida - VUSec group at VU Amsterdam.

Intel, and nearly the entire technology industry, follows a disclosure practice called Coordinated Disclosure, under which a cybersecurity vulnerability is generally publicly disclosed only after mitigations are available.

Revision History

[table][tr]Revision Date Description [/tr] [tr][td]1.0[/td] [td]05/14/2019[/td] [td]Initial Release[/td] [/tr] [/table]
Click to expand...

Source: https://www.intel.com/content/www/us...-sa-00233.html

See also:

Windows client guidance for IT Pros to protect against speculative

Summary of Intel microcode updates

KB4497165 Intel microcode updates for Windows 10 v1903 - May 14

KB4494452 Intel microcode updates for Windows 10 v1709 - May 14

KB4494453 Intel microcode updates for Windows 10 v1703 - May 14

KB4494175 Intel Microcode Updates for Windows 10 v1607 - May 14

KB4494454 Intel Microcode Updates for Windows 10 v1507 - May 14

Windows 10: Intel Introduces Tremont Microarchitecture

Intel Introduces Tremont Microarchitecture

Intel Introduces Tremont Microarchitecture

Intel Introduces Tremont Microarchitecture

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